- PEEC is a new, patent pending, characterization module for ASAP-1 IPS digital sample preparation system. PEEC improves sample preparation techniques, particularly at extremely thin remaining silicon thickness (RST).
- PEEC offers several plotting and mapping modes that work in parallel with the ASAP-1 IPS, with the main polishing system acting as the Control Unit.
- A key features that PEEC adds to ASAP-1 IPS, is the novel ability to characterize and act upon electronic thresholds obtained from topside circuitry.
- This information is gathered REAL TIME, through the polishing media, using the actual polishing bit as the probe.
- Knowing this information allows the user to make informed preparation decisions, to achieve exactly the required RST, over the specified die area.
- PEEC adds to the Engineers' toolkit in the preparation of parts, for current and future, analytical requirements such as SIL.
- Sample Preparation with the Lights On!
- Through-silicon method
- Uses device IV curves to measure threshold and breakdown characteristics
- DYNAMIC - Realtime charaterization through polishing media DURING preparation
- Suits very thin substrate thicknesses, below measurement limits of other backside measurement methods
- Additional Plot Mode shows Tool Path -- shows force or electrical properties
- Oscilloscope Mode
- Interactive Touchscreen OS