High-speed Memory Repair Analysis (MRA)
The T5385 is enabled by hardware and software advances, including a highspeed memory repair analysis (MRA) system for DRAM and flash memory wafer test that greatly reduces test time. In fact, test times can be shortened by 30% when compared with the company's previous model test system. Hiding redundancy processing and the transfer of yield-learning data further reduces wafer test times while improving both process parameters and business margins.
High-Throughput and Low Test Costs Achieved
DRAM memory chips used in today's computers and other electronics deliver faster processing speeds, higher data storage volumes, and more efficient power consumption than previous generation devices. To enable these gains, the semiconductor industry is aggressively migrating to smaller process nodes that allow more chips and greater densities to be produced from each wafer. Throughput has therefore become a critical issue in DRAM wafer test, with chipmakers demanding significant gains to increase productivity. ADVANTEST's new T5385 delivers an unrivaled parallel test capability and flexible pin configurations that significantly improve throughput in the wafer test process.
Flash-memory Capability
The T5385 also supports flash memory wafer test. It boasts a proprietary tester-per-site architecture optimized for flash memory, contributing to reduced test times.
Thông số kỹ thuật
Major Specifications
| Target Devices |
General-purpose Logic IC, General-purpose Analog IC, Optical semiconductor device, Discrete device etc. |
| Parallel Testing |
Max. 8 devices |
Basic Configuration
| Device Power Supply |
2 channels to max. 8 channels
±128V/±32mA, ±64V/±80mA, ±16V/±500mA, ±16V/±2A (pulse) |
| Power Supply for I/O |
8 channels to max. 64 channels
±64V/±32mA, ±16V/±64mA |
Option
| High Voltage Power Supply |
1 channel to 8 channels (MPX switch)
+2kV/+1mA (per 1 channel) |
| Time Measurement Unit |
8ch (A/B×4ch)
Measurement Range 5ns to 10s
Resolution 100ps |
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