The requirements of today’s high-speed memory - higher speeds, performance, production volume - means that test systems must offer greater functionality and parallelism while maintaining low cost of test. The scalable platform architecture of the Advantest V93000 HSM combines functionality, performance and flexibility into a single test system with unmatched overall test economics for outstanding return on investment.
Leveraging the proven per-pin timing architecture and technology components of the V93000 platform, the HSM series features significant architectural extensions addressing the unique requirements for final test of DRAMs, thus becoming a TRUE memory-ATE-per-pin architecture. With the majority of the functionality tightly integrated into the system’s test head, the platform offers superior performance, parallelism, unprecedented scalability and control.
The scalability of the V93000 HSM platform means it is future-ready, offering upgradeability to data rates beyond those of today - true investment protection for DDR3, DDR4 and future DRAM technologies.
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